On 5 May, the White Helmets and Westerns displayed the latest technical reserve, and the parties are making efforts to achieve 8 plan 3D NAND equipment and 3D NAND IC, with a line of over 300 words. Address cited here: Based on its published technical papers, the secretariat and the GM show an eight-stage 1Tb 3D TLC NAND, with more than 1,210 source and 3.2 GT/s interfaces, which can provide 205 MB/s procedures for embedding, with delays in reading down to 40 micro-seconds.